Silicon Labs /Series1 /WGM160 /WGM160PX22KGA3 /CAN0 /STATUS

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Interpret as STATUS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NONE)LEC0 (TXOK)TXOK 0 (RXOK)RXOK 0 (EPASS)EPASS 0 (EWARN)EWARN 0 (BOFF)BOFF

LEC=NONE

Description

Status Register

Fields

LEC

Last Error Code

0 (NONE): No error occurred during last CAN bus event.

1 (STUFF): More than 5 equal bits in a sequence have occurred in a part of a received message where this is not allowed.

2 (FORM): A fixed format part of a received frame has the wrong format.

3 (ACK): The message this CAN Core transmitted was not acknowledged by another node.

4 (BIT1): During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value 1), but the monitored bus value was dominant.

5 (BIT0): During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored Bus value was recessive. During Bus Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed).

6 (CRC): The CRC check sum was incorrect in the message received; the CRC received for an incoming message does not match with the calculated CRC for the received data.

7 (UNUSED): When the LEC shows the value ‘7’, no CAN bus event was detected since the CPU wrote this value to the LEC.

TXOK

Transmitted a Message Successfully

RXOK

Received a Message Successfully

EPASS

Error Passive

EWARN

Warning Status

BOFF

Bus Off Status

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